1. Field of the Invention
The present invention relates to a voltage regulator circuit, and more specifically, to a low noise and fast stable voltage regulator circuit.
2. Description of the Prior Art
A voltage regulator circuit is frequently used to provide a stable voltage source. In order to suppress the noise inherent in the reference voltage, a RC low pass filter is usually added in front of the voltage comparator to make sure that the voltage regulator circuit can generate an output voltage with low noise.
However, a RC low pass filter not only suppresses noise but also introduce a RC time delay while the signal is processed. This RC time delay causes the voltage regulator circuit to waste more time for stabilizing the voltage signal.
Please refer to FIG. 1, a simple block diagram of a low noise voltage regulator circuit of the prior art is illustrated. The low noise voltage regulator circuit 100 contains a reference voltage generator 110, a RC low pass filter 120, and a stabilizing circuit 130. The reference voltage generator 110 is electrically coupled to a first node 150, it is used to generate a reference voltage Vr. The RC low pass filter 120 is electrically coupled between the first node 150 and a second node 160, it receives the reference voltage Vr from the first node 150 and generates a low noise voltage Vln. The stabilizing circuit 130 is electrically coupled to the second node 160 and a third node 170, it receives the low noise voltage Vln from the second node 160 and generates a low noise stable voltage Vreg, then outputs the low noise stable voltage Vreg to the third node 170.
If the reference voltage generator 110 starts to output the reference voltage Vr at time t0, because of the time delay effect caused by the RC low pass filter 120, the low noise voltage Vln will be charged to the value of the reference voltage Vr at time t0+Δt, where Δt>0. Even if the reference voltage Vr is already stable at time t0, the stabilizing circuit 130 still have to wait until time t0+Δt to get the low noise voltage Vln. Then the stabilizing circuit 130 can start to output the low noise stable voltage Vreg at the third node 170. The time delay effect (that is, Δt) will slow down the speed of the whole circuit.
The switching delay on the low noise stable voltage Vreg reduces the battery lifetime of the other consuming circuits which use the low noise stable voltage Vreg as its power supply. Therefore it is desired to reduce the time delay effect on the signal caused by the RC low pass filter 120.